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Ballistic Deflection Devices Ballistic Deflection Devices

This research project involves the investigation of ballistic electron transport properties in high ¨C mobility III-V semiconductors and further looks at how to exploit these effects to realize ultra ¨C low power logic devices.

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Emerging Device Architectures Emerging Device Architectures

There are several ongoing research projects in our group related to energy efficient nanoelectronics. Broadly, our research efforts are directed at developing novel devices and circuits for more-of-Moore and more-than-Moore applications.

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Graphene based RF Devices and Circuits Graphene based RF Devices and Circuits

This research focuses on the fabrication and optimization of graphene based devices for practical applications.

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High-k Dielectric Gated Quantum-Well Transistors High-k Dielectric Gated Quantum-Well Transistors

This research involves investigation of an optimal scalable architecture for compound semiconductor based quantum-well transistors (QWFETs) in the narrow gap CS materials space.

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Inter-band Tunnel Transistors and Related Circuits Inter-band Tunnel Transistors and Related Circuits

This research is directed at demonstrating the minimum energy-delay product performance of inter-band tunneling transistors that can be realized by using narrow and direct gap high mobility heterostructure materials, such as InxGa1-xAs (0.53 < x < 1) .

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On Chip Magnetoelectric Sensor On Chip Magnetoelectric Sensor

A novel chip-scale ultra-sensitive magnetic sensor, MagnetoElectric Flexural Gate Transistor (MEFGT) capable of measuring pico Tesla biomagnetic field and capable of operating at room temperature has been developed in this research program.

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Soft Error in Emerging Devices Soft Error in Emerging Devices

This research project focuses on radiation induced single-event upset (SEU) in emerging devices.

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Sub Hundred Millivolt Supply Voltage Logic Architecture Sub Hundred Millivolt Supply Voltage Logic Architecture

Many emerging nanoscale devices, charge or alternate state variable based, exhibit low transconductance and output resistance under very low operating voltage conditions, making it essential to reconsider device design in conjunction with new logic representation. To circumvent the limited device gain related issues at low voltages, we are exploring a novel interconnectless binary decision diagram (BDD) based logic architecture based on 2 classes of building blocks such as wrapped gate nanowires and split gate nanodots.

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Variation in Emerging Devices Variation in Emerging Devices

This research compares the variation handling capabilities of Silicon and III-V based novel devices.

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