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Soft Error in Emerging Devices

This research project focuses on radiation induced single-event upset (SEU) in emerging devices. Soft error has become a key challenge for cloud computing with growing number of processors in data center. With proposed introduction of low bandgap materials (Ge, III-Vs) as channel replacement and steep switching devices for low voltage application, charge generation from sea-level neutron radiation needs to be evaluated due to their low ionization energy. In this project, the soft error generation and propagation in Si FinFET, III-V FinFET and III-V Hetero-junction Tunnel FET (HTFET) are investigated using device and circuit simulation. The device simulation shows that III-V FinFET presents enhanced charge collection, while HTFET presents significant reduction of the bipolar gain effect and charge collection. Based on the critical LET extraction, SRAM bit-flip, electrical masking effect as well as the latching window masking effect has been analyzed for these devices. The SER performance evaluation of SRAM and Logic with voltage scaling shows that HTFET based SRAM and Logic are desirable for radiation resilient ultra-low power application. III-V FinFET shows increased charge deposition due to low ionization energy, which increases the SER for SRAM cell for all VDD compared to Si FinFET. For Logic, III-V FinFET shows reduced SER than Si FinFET below 0.5V.

Soft Eror in Emerging Devices